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irl3705ns/l hexfet ? power mosfet pd - 91502c l advanced process technology l surface mount (irl3705ns) l low-profile through-hole (irl3705nl) l 175c operating temperature l fast switching l fully avalanche rated absolute maximum ratings fifth generation hexfets from international rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that hexfet power mosfets are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. the d 2 pak is a surface mount power package capable of accommodating die sizes up to hex-4. it provides the highest power capability and the lowest possible on- resistance in any existing surface mount package. the d 2 pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0w in a typical surface mount application. the through-hole version (irl3705nl) is available for low- profile applications. description v dss = 55v r ds(on) = 0.01 w i d = 89a ? 2 d pak to-262 s d g 5/12/98 l logic-level gate drive parameter typ. max. units r q jc junction-to-case CCC 0.90 r q ja junction-to-ambient ( pcb mounted,steady-state)** CCC 40 thermal resistance c/w parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v ? 89 ? i d @ t c = 100c continuous drain current, v gs @ 10v ? 63 a i dm pulsed drain current ?? 310 p d @t a = 25c power dissipation 3.8 w p d @t c = 25c power dissipation 170 w linear derating factor 1.1 w/c v gs gate-to-source voltage 16 v e as single pulse avalanche energy ?? 340 mj i ar avalanche current ? 46 a e ar repetitive avalanche energy ? 1.7 mj dv/dt peak diode recovery dv/dt ?? 5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c
irl3705ns/l electrical characteristics @ t j = 25c (unless otherwise specified) parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode) ? CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC 1.3 v t j = 25c, i s = 46a, v gs = 0v ? t rr reverse recovery time CCC 94 140 ns t j = 25c, i f = 46a q rr reverse recovery charge CCC 290 440 nc di/dt = 100a/s ?? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics s d g a 89 ? 310 ? pulse width 300s; duty cycle 2%. notes: ? uses irl3705n data and test conditions ** when mounted on 1" square pcb ( fr-4 or g-10 material ). for recommended footprint and soldering techniques refer to application note #an-994. ? i sd 46a, di/dt 250a/s, v dd v (br)dss , t j 175c ? v dd = 25v, starting t j = 25c, l = 320h r g = 25 w , i as = 46a. (see figure 12) ? repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) parameter min. typ. max. u nits conditions v (br)dss drain-to-source breakdown voltage 55 CCC CCC v v gs = 0v, i d = 250a d v (br)dss / d t j breakdown voltage temp. coefficient CCC 0.056 CCC v/c reference to 25c, i d = 1ma ? CCC CCC 0.010 v gs = 10v, i d = 46a ? CCC CCC 0.012 w v gs = 5.0v, i d = 46a ? CCC CCC 0.018 v gs = 4.0v, i d = 39a ? v gs(th) gate threshold voltage 1.0 CCC 2.0 v v ds = v gs , i d = 250a g fs forward transconductance 50 CCC CCC s v ds = 25v, i d = 46a ? CCC CCC 25 v ds = 55v, v gs = 0v CCC CCC 250 v ds = 44v, v gs = 0v, t j = 150c gate-to-source forward leakage CCC CCC 100 na v gs = 16v gate-to-source reverse leakage CCC CCC -100 v gs = -16v q g total gate charge CCC CCC 98 i d = 46a q gs gate-to-source charge CCC CCC 19 nc v ds = 44v q gd gate-to-drain ("miller") charge CCC CCC 49 v gs = 5.0v, see fig. 6 and 13 ?? t d(on) turn-on delay time CCC 12 CCC v dd = 28v t r rise time CCC 140 CCC i d = 46a t d(off) turn-off delay time CCC 37 CCC r g = 1.8 w, v gs = 5.0v t f fall time CCC 78 CCC r d = 0.59 w, see fig. 10 ?? between lead, CCC CCC and center of die contact c iss input capacitance CCC 3600 CCC v gs = 0v c oss output capacitance CCC 870 CCC pf v ds = 25v c rss reverse transfer capacitance CCC 320 CCC ? = 1.0mhz, see fig. 5 ? nh i gss r ds(on) static drain-to-source on-resistance l s internal source inductance 7.5 ns i dss drain-to-source leakage current a ? calculated continuous current based on maximum allowable junction temperature; for recommended current-handling of the package refer to design tip # 93-4
irl3705ns/l fig 1. typical output characteristics fig 2. typical output characteristics fig 4. normalized on-resistance vs. temperature fig 3. typical transfer characteristics 1 10 100 1000 0.1 1 10 100 i , drain-to-source current (a) d v , drain-to-source volta g e ( v ) ds a 20 s pulse w idth t = 25c j vgs top 15v 12v 10v 8.0v 6.0v 4.0v 3.0v bottom 2.5v 2.5v 1 10 100 1000 0.1 1 10 100 i , drain-to-source current (a) d v , drain-to-source volta g e ( v ) ds a 20 s pulse w idth t = 175c vgs top 15v 12v 10v 8.0v 6.0v 4.0v 3.0v bottom 2.5v 2.5v j 1 10 100 1000 2.0 3.0 4.0 5.0 6.0 7.0 8.0 t = 25c j gs v , gate-to-source volta g e (v) d i , drain-to-source current (a) t = 175c j a v = 2 5 v 20s pulse w idth ds 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 j t , junction temperature (c) r , drain-to-source o n resistance ds(on) (normalized) v = 10v gs a i = 77a d
irl3705ns/l fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 1000 2000 3000 4000 5000 6000 1 10 100 c, capacitance (pf) ds v , drain-to-source volta g e ( v ) a v = 0v , f = 1mhz c = c + c , c shorte d c = c c = c + c gs iss gs gd ds rss gd oss ds gd c iss c oss c rss 0 3 6 9 12 15 0 20 40 60 80 100 120 140 q , total g ate char g e ( nc ) g v , g ate-to-source voltage (v) gs a for test circuit s ee figure 13 i = 46 a v = 44v v = 28v d ds ds 10 100 1000 0.4 0.8 1.2 1.6 2.0 2.4 2.8 t = 25c j v = 0v gs v , source-to-drain voltage (v) i , reverse drain current (a) sd sd a t = 175c j 1 10 100 1000 1 10 100 v , drain-to-source volta g e ( v ) ds i , drain current (a) ope ration in this area limite d by r d ds(on) 10s 100s 1ms 10ms a t = 25c t = 175c sin g le p u ls e c j
irl3705ns/l fig 10a. switching time test circuit v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms v ds pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 5.0v + - v dd fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 25 50 75 100 125 150 175 0 20 40 60 80 100 t , case temperature ( c) i , drain current (a) c d limited by package 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)
irl3705ns/l q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 m f 50k w .2 m f 12v current regulator same type as d.u.t. current sampling resistors + - 5.0 v fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current 0 200 400 600 800 25 50 75 100 125 150 175 j e , single pulse avalanche energy (mj) as a startin g t , junction temperature ( c ) v = 25v i top 19a 33a bo tto m 46a dd d fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 w t p d.u.t l v ds + - v dd driver a 15v 10v
irl3705ns/l peak diode recovery dv/dt test circuit p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfets * v gs = 5v for logic level devices ? ? ? r g v dd dv/dt controlled by r g driver same type as d.u.t. i sd controlled by duty factor "d" d.u.t. - device under test d.u.t circuit layout considerations low stray inductance ground plane low leakage inductance current transformer ? *
irl3705ns/l d 2 pak package outline d 2 pak part marking information 10.16 (.400) re f. 6.47 (.255) 6.18 (.243) 2.61 (.103) 2.32 (.091) 8.89 (.350) r e f. - b - 1.32 (.052) 1.22 (.048) 2.79 (.110) 2.29 (.090) 1.39 (.055) 1.14 (.045) 5.28 (.208) 4.78 (.188) 4.69 (.185) 4.20 (.165) 10.54 (.415) 10.29 (.405) - a - 2 1 3 15.49 (.610) 14.73 (.580) 3x 0.93 (.037) 0.69 (.027) 5.08 (.200) 3x 1.40 (.055) 1.14 (.045) 1.78 (.070) 1.27 (.050) 1.40 (.055) m ax. notes: 1 dimensions after solder dip. 2 dimensioning & tolerancing per ansi y14.5m, 1982. 3 controlling dimension : inch. 4 heatsink & lead dimensions do not include burrs. 0.55 (.022) 0.46 (.018) 0.25 (.010) m b a m minimum recommended footprint 11.43 (.450) 8.89 (.350) 17.78 (.700) 3.81 (.150) 2.08 (.082) 2x lead assignments 1 - ga te 2 - d r ain 3 - s ou rc e 2.54 (.100) 2x part number international rectifier logo date code (yyw w ) yy = year ww = week assembly lot code f530s 9b 1m 9246 a
irl3705ns/l package outline to-262 outline to-262 part marking information
irl3705ns/l tape & reel information d 2 pak world headquarters: 233 kansas st., el segundo, california 90245, tel: (310) 322 3331 european headquarters: hurst green, oxted, surrey rh8 9bb, uk tel: ++ 44 1883 732020 ir canada: 7321 victoria park ave., suite 201, markham, ontario l3r 2z8, tel: (905) 475 1897 ir germany: saalburgstrasse 157, 61350 bad homburg tel: ++ 49 6172 96590 ir italy: via liguria 49, 10071 borgaro, torino tel: ++ 39 11 451 0111 ir far east: k&h bldg., 2f, 30-4 nishi-ikebukuro 3-chome, toshima-ku, tokyo japan 171 tel: 81 3 3983 0086 ir southeast asia: 315 outram road, #10-02 tan boon liat building, singapore 0316 tel: 65 221 8371 http://www.irf.com/ data and specifications subject to change without notice. 5/98 3 4 4 trr feed direction 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) trl feed direction 10.90 (.42 9) 10.70 (.42 1) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957) 23.90 (.941) 0.368 (.0145) 0.342 (.0135) 1.60 (.06 3) 1.50 (.05 9) 13.50 (.532) 12.80 (.504) 330.00 (14.173) max. 27.40 (1.079) 23.90 (.941) 60.00 (2.362) min . 30.40 (1.197) max. 26.40 (1.039) 24.40 (.961) notes : 1. comforms to eia-418. 2. controlling dimension: millimeter. 3. dimension measured @ hub. 4. includes flange distortion @ outer edge.
note: for the most current drawings please refer to the ir website at: http://www.irf.com/package/

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